Reducing effective cycle time in accessing memory modules

A method that reduces a row cycle time of an individual memory module to an effective row cycle time shorter than the row cycle time using a plurality of memory modules including at least a first module and a second module, including:

• initiating read and write operations on the plurality of memory modules, wherein a minimum total time for read and write operations is less than twice the row cycle time for the individual memory module of the plurality of memory modules, for performing all of:
• (i) initiating a first read operation on the first memory module of the plurality of memory modules, (ii) initiating a set of write operations of a same data value on all memory modules, and (iii) initiating a second read operation on the second memory module of the plurality of memory modules.

A computer system that reduces a row cycle time of an individual memory module to an effective row cycle time shorter than the row cycle time using a plurality of memory modules having a circular sequence, the computer system including one or more processors configured to perform operations including:

• initiating a set of read operations on different memory modules of the plurality of memory modules in the circular sequence from a first read operation initiated on a first module of the plurality of memory modules to a last read operation initiated on a second module;
• and
• after initiating each read operation of the set of read operations on a particular memory module of the plurality of memory modules and prior to initiating a next read operation in the set of read operations, initiating a set of write operations to write a same value to all of the plurality of memory modules in the circular sequence beginning one memory module after the particular memory module.

A computer system that reduces a row cycle time of an individual memory module to an effective row cycle time shorter than the row cycle time using a plurality of memory modules including at least a first module and a second module, the computer system including one or more processors configured to perform operations including:

• initiating read and write operations on the plurality of memory modules, wherein a minimum total time for read and write operations is less than twice the row cycle time for the individual memory module of the plurality of memory modules, for performing all of:
• (i) initiating a first read operation on the first memory module of the plurality of memory modules, (ii) initiating a set of write operations of a same data value on all memory modules, and (iii) initiating a second read operation on the second memory module of the plurality of memory modules.