Methods and apparatus for intra-set wear-leveling for memories with limited write endurance
AssigneeQUALCOMM Incorporated
InventorXiangyu Dong
Life of this patent
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Abstract
Efficient techniques are described for extending the usable lifetime for memories with limited write endurance. A technique for wear-leveling of caches addresses unbalanced write traffic on cache lines which cause heavily written cache lines to fail much fast than other lines in the cache. A counter is incremented for each write operation to a cache array. A line affected by a current write operation which caused the counter to meet a threshold is evicted from the cache rather than writing data to the affected line. A dynamic adjustment of the threshold can be made depending on the operating program. Updates to a current replacement policy pointer are stopped due to the counter meeting the threshold.
Claims20
A method for wear-leveling of a cache, the method comprising:
- incrementing a counter for each write operation to the cache;
- evicting from the cache a line affected by a current write operation which caused the counter to meet a threshold;
- and
- stopping the current write to the line affected by the current write operation due to the counter meeting the threshold.
An apparatus for wear-leveling a cache, the apparatus comprising:
- a cache having a plurality of ways coupled to a processor complex which controls write operations to write data to the cache;
- a write threshold circuit and a counter circuit configured to count the write operations to the cache and to generate an indication when the counter circuit has reached a threshold based on a comparison of a count output of the counter circuit with a threshold value;
- a line flush circuit configured to evict from the cache a line affected by the current write operation in response to the indication;
- and
- a replacement policy circuit is configured to stop updates to change a current line replacement policy pointer in response to the indication.
A computer readable non-transitory medium encoded with computer readable program data and code, the program data and code when executed operable to:
- increment a counter for each write operation to a cache;
- evict from the cache a line affected by a current write operation which caused the counter to meet a threshold;
- and
- stop the current write to the line affected by the current write operation due to the counter meeting the threshold.
An apparatus for wear-leveling a cache, the apparatus comprising:
- means for writing data to a cache having a plurality of ways coupled to a processor complex;
- means for counting write operations to the cache and generating an indication when the counter has reached a threshold;
- means for evicting from the cache a line affected by the current write operation in response to the indication;
- and
- means for stopping updates to change a current line replacement policy pointer in response to the indication.
Dependencies are inferred from the claim text.