Filtering snoop traffic in a multiprocessor computing system

A multiprocessor computing system with snoop traffic filtering, the computing system comprising a plurality of processors, each processor in the multiprocessor computing system coupled to a high level cache and a low level cache, a main memory that is shared among the processors, and a cache controller configured to carry out the steps of:

• receiving a snoop message, wherein the snoop message identifies an address in shared memory targeted by a write operation;
• identifying a set in the high level cache that maps to the address in shared memory, wherein the set includes all locations in the high level cache for an entry associated with the address in shared memory;
• determining whether the high level cache includes an entry associated with the address in shared memory;
• responsive to determining that the high level cache does not include an entry corresponding to the address in shared memory:
• determining whether the set in the high level cache has been bypassed by an entry in the low level cache;
• and
• responsive to determining that the set in the high level cache has not been bypassed by an entry in the low level cache, discarding the snoop message.

A computer program product for filtering snoop traffic in a multiprocessor computing system, each processor in the multiprocessor computing system coupled to a high level cache, a low level cache, and a shared main memory, the computer program product disposed upon a computer readable storage medium, the computer program product comprising computer program instructions that, when executed, cause a computer to carry out the steps of:

• receiving, by a cache controller, a snoop message, wherein the snoop message identifies an address in shared memory targeted by a write operation;
• identifying, by the cache controller, a set in the high level cache that maps to the address in shared memory, wherein the set includes all locations in the high level cache for an entry associated with the address in shared memory;
• determining, by the cache controller, whether the high level cache includes an entry associated with the address in shared memory;
• responsive to determining that the high level cache does not include an entry corresponding to the address in shared memory:
• determining, by the cache controller, whether the set in the high level cache has been bypassed by an entry in the low level cache;
• and
• responsive to determining that the set in the high level cache has not been bypassed by an entry in the low level cache, discarding, by the cache controller, the snoop message.