Hot memory block table in a solid state storage device
AssigneeMicron Technology, Inc.
InventorTroy Manning
Life of this patent
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Abstract
Solid state storage devices and methods for populating a hot memory block look-up table (HBLT) are disclosed. In one such method, an indication to an accessed page table or memory map of a non-volatile memory block is stored in the HBLT. If the page table or memory map is already present in the HBLT, the priority location of the page table or memory map is increased to the next priority location. If the page table or memory map is not already stored in the HBLT, the page table or memory map is stored in the HBLT at some priority location, such as the mid-point, and the priority location is incremented with each subsequent access to that page table or memory map.
Claims20
A method of operating a solid state memory device, the method comprising:
- storing an indication of a memory map at a priority location in a memory block look-up table in response to the memory map being accessed, wherein the memory map contains a plurality of logical block addresses of data to be translated by a translation layer.
A method of operating a solid state memory device, the method comprising:
- increasing a priority location of an indication of the memory map in a memory look-up table from a first priority location to a second priority location in response to the memory map being accessed, wherein the memory map contains a plurality of logical block addresses of data to be translated by a translation layer.
An apparatus, comprising:
- a controller comprising a translation layer;
- wherein the translation layer is configured to translate a plurality of logical block addresses of data contained in a memory map;
- wherein the controller is configured to store an indication of the memory map in a memory block look-up table in response to the memory map being accessed.
An apparatus, comprising:
- a controller comprising a translation layer;
- wherein the translation layer is configured to translate a plurality of logical block addresses of data contained in a memory map;
- wherein the controller is configured to increase a priority location of an indication of the memory map in a memory look-up table from a first priority location to a second priority location in response to the memory map being accessed.
Dependencies are inferred from the claim text.