Tester with mixed protocol engine in a fpga block

A method for testing using an automated test equipment (ATE), said method comprising:

• transmitting instructions for performing an automated test from a system controller to a tester processor;
• programming at least one reconfigurable circuit for implementing one of a plurality of communication protocols onto each of a plurality of FPGA components coupled to said tester processor;
• writing test data to a plurality of devices to be tested (DUTs) from said plurality of FPGA components using said one of a plurality of communication protocols;
• and
• reading test data from said plurality of DUTs to said plurality of FPGA components using said one of a plurality of communication protocols, wherein both said writing and said reading is conducted in accordance with said instructions from said system controller.

A tester system comprising:

• a system controller for controlling a test program and coupled to a bus;
• a plurality of modules coupled to said bus and each operable to test a plurality of devices under test wherein each module comprises:
• a tester processor coupled to said bus;
• a plurality of configurable blocks communicatively coupled to said tester processor, each configurable block operable to communicate with an associated device under test and further operable to be programmed with a communication protocol for communicating test data to and from said associated device under test.