3d stacked nand flash memory array having ssl status check buildings for monitoring threshold voltages of string selection transistors and methods for monitoring and operating the same

A 3D stacked NAND flash memory array comprising:

• a memory building block composed of one or more unit buildings, each of the unit buildings comprising a plurality of active lines formed at a regular interval in one direction, a plurality of string selection lines, a plurality of word lines and a ground selection line vertically crossing the plurality of active lines and being disposed at a regular interval in another direction, each of the active lines being formed of a plurality of semiconductor layers vertically stacked on a substrate and having one end connected to a bit line,
• wherein an SSL status check building is further formed at one side of the memory building block on the substrate for checking threshold voltages of string selection transistors formed with the plurality of string selection lines, the SSL status check building having the same structure as that of the unit building.