Semiconductor device and control method of the same
AssigneeNEC Corporation
InventorsRyusuke Nebashi, Noboru Sakimura, Yukihide Tsuji, Ayuka Tada
Life of this patent
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Abstract
A semiconductor device includes non-volatile registers, each including a holding circuit to hold data in a volatile manner and a non-volatile element. An address is allocated to each of the non-volatile registers. A non-volatile register control circuit performs control such that, in response to a write instruction, data held in the holding circuit is written to the non-volatile element in the non-volatile register having the address specified by the instruction and in response to a load instruction, data held in the non-volatile element is held in the holding circuit in the non-volatile register having the address specified by the instruction.
Claims15
A semiconductor device comprising:
- an instruction decoder configured to decode an instruction read from a storage equipment;
- one or a plurality of non-volatile registers, each non-volatile register having an address allocated, said each non-volatile register including at least one flip-flop, said flip-flop including:
- a holding circuit configured to hold data in a volatile manner;
- and
- a non-volatile element configured to hold data in a non-volatile manner;
- and
- a non-volatile register control circuit configured to control said one or plurality of non-volatile registers,
- wherein an instruction set decodable by said instruction decoder comprises at least:
- a write instruction including information specifying an address of said non-volatile register and information specifying writing of data from said holding circuit to said non-volatile element in said non-volatile register;
- and
- a load instruction including information specifying an address of said non-volatile register and information specifying loading from said non-volatile element to said holding circuit in said non-volatile register,
- said non-volatile register control circuit performing control such that, when an instruction decoded by said instruction decoder is said write instruction, data held in said holding circuit is transferred and written to said non-volatile element in said non-volatile register having an address specified by said write instruction, while, when said instruction decoded by said instruction decoder is said load instruction, data held in said non-volatile element is transferred to and held in said holding circuit in said non-volatile register having an address specified by said load instruction.
A control method of a semiconductor device comprising one or a plurality of non-volatile registers each including at least one flip-flop including a holding circuit configured to hold data in a volatile manner and a non-volatile element configured to hold said data in a non-volatile manner, an address being given to each non-volatile register, said method comprising:
- provided as an instruction set decodable by an instruction decoder, at least:
- a write instruction including information specifying an address of said non-volatile register and information specifying writing data from said holding circuit to said non-volatile element in said non-volatile register;
- and
- a load instruction including information specifying said address of said non-volatile register and information specifying loading from said non-volatile element to said holding circuit in said non-volatile register,
- when an instruction decoded by said instruction decoder is said write instruction, transferring said data held in said holding circuit to be written to said non-volatile element in said non-volatile register having an address specified by said write instruction, and
- when said instruction decoded by said instruction decoder is said load instruction, transferring said data held in said non-volatile element to be held in said holding circuit in said non-volatile register having said address specified by said load instruction.
A processor apparatus comprising
- one or a plurality of non-volatile registers, each non-volatile register having an address allocated, said each non-volatile register including at least one flip-flop, said flip-flop including:
- a holding circuit configured to hold data in a volatile manner;
- and
- a non-volatile element configured to hold data in a non-volatile manner;
- and
- a non-volatile register control circuit configured to control said one or plurality of non-volatile registers,
- an instruction set for said processor apparatus comprising at least:
- a write instruction including information specifying an address of said non-volatile register and information specifying writing of data from said holding circuit to said non-volatile element in said non-volatile register;
- and
- a load instruction including information specifying an address of said non-volatile register and information specifying loading from said non-volatile element to said holding circuit in said non-volatile register,
- in response to said write instruction, said non-volatile register control circuit performing control such that data held in said holding circuit is transferred and written to said non-volatile element in said non-volatile register having an address specified by said write instruction, while, in response to said load instruction, said non-volatile register control circuit performing control such that data held in said non-volatile element is transferred to and held in said holding circuit in said non-volatile register having an address specified by said load instruction.
Dependencies are inferred from the claim text.