Apparatuses and operation methods associated with resistive memory cell arrays with separate select lines

A method of operating an array of resistive memory cells, comprising:

• applying a first signal to a selected data line coupled to a first memory cell and a second memory cell, wherein the first memory cell includes a first resistive storage element and a first access device, and wherein the second memory cell includes a second resistive storage element and a second access device;
• and
• applying a second signal to a conductive line coupled to an isolation device formed between the first access device and the second access device;
• applying a third signal to a first select line coupled to the first resistive storage element;
• applying a fourth signal to a second select line coupled to the second resistive storage element;
• applying a fifth signal to a selected conductive line coupled to the first access device;
• applying a sixth signal to a conductive line coupled to the second access device;
• and
• applying a seventh signal to unselected data lines of the array.

A method of operating a resistive memory device, comprising:

• applying a first voltage to a selected data line coupled to a first memory cell and a second memory cell, wherein the first memory cell includes a first resistive storage element and a first access device, and wherein the second memory cell includes a second resistive storage element and a second access device;
• and
• applying a reference voltage to a conductive line coupled to an isolation device formed between the first access device and the second access device when operating the resistive memory apparatus in a first mode;
• applying a third voltage to a first select line coupled to the first resistive storage element;
• applying a fourth voltage to a second select line coupled to the second resistive storage element;
• applying a fifth voltage to a selected conductive line coupled to the first access device;
• applying a sixth voltage to a conductive line coupled to the second access device;
• and
• applying a seventh voltage to unselected data lines of the array.

An apparatus, comprising:

• an array of memory cells;
• and
• a controller configured to:
• apply a first signal to a selected data line coupled to a first memory cell and a second memory cell, wherein the first memory cell includes a first resistive storage element and a first access device, and wherein the second memory cell includes a second resistive storage element and a second access device;
• and
• apply a second signal to a conductive line coupled to an isolation device formed between the first access device and the second access device;
• apply a third signal to a first select line coupled to the first resistive storage element;
• apply a fourth signal to a second select line coupled to the second resistive storage element;
• apply a fifth signal to a selected conductive line coupled to the first access device;
• apply a sixth signal to a conductive line coupled to the second access device;
• and
• apply a seventh signal to unselected data lines of the array.