Low power quantizer for analog to digital converter

An analog-to-digital converter (ADC) comprising:

• an analog loop filter having an input for receiving an input signal of said ADC and producing a filtered input signal from said input signal;
• and
• a quantizer having an input coupled to an output of said loop filter, wherein said quantizer quantizes said filtered input signal from said loop filter to produce a sequence of digital samples, said quantizer comprising:
• a voltage reference network configured to generate a plurality of reference voltages;
• and
• a set of comparators coupled with said voltage reference network, each of said comparators being configured to receive said filtered input signal, wherein said set of comparators comprises first, second, and third subsets of comparators, each comparator of said first subset including a first switched capacitor stage and a first latch stage coupled to a first output of said first switched capacitor stage, each comparator of said second subset including a preamplifier stage and a second latch stage coupled to a second output of said preamplifier stage, and each comparator of said third subset including a second switched capacitor stage and a third latch stage coupled to a third output of said second switched capacitor stage.

A method of performing analog-to-digital conversion using an analog-to-digital converter (ADC), said ADC comprising a quantizer, said quantizer comprising a voltage reference network and a set of comparators coupled with said voltage reference network, and said method comprises:

• receiving an input signal at each of said comparators, wherein said set of comparators includes first, second, and third subsets of comparators, each comparator of said first subset including a first switched capacitor stage, each comparator of said second subset including a preamplifier stage, and each comparator of said third subset including a second switched capacitor stage;
• providing a plurality of reference voltages to said comparators via said voltage reference network, one each of said reference voltages being associated with one each of said comparators;
• converting said input signal into a sequence of digital samples using said ADC, said converting operation including:
• comparing, at said each comparator of said first subset, said input signal with one of said reference voltages from a first set of said reference voltages, said first set of said reference voltages corresponding to an upper voltage range of said input signal;
• comparing, at said each comparator of said second subset, said input signal with one of said reference voltages from a second set of said reference voltages, said second set of said reference voltages corresponding to a middle voltage range of said input signal;
• and
• comparing, at said each comparator of said third subset, said input signal with one of said reference voltages from a third set of said reference voltages, said third set of said reference voltages corresponding to a lower voltage range of said input signal, wherein said upper voltage range is greater than said middle voltage range, and said lower voltage range is less than said middle voltage range.