Internal voltage generation circuit
AssigneeRenesas Electronics Corporation
InventorJunko MATSUMOTO
Life of this patent
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Abstract
In an internal voltage generation circuit, four charge pump circuits are provided, the first two charge pump circuits are driven with a long period at the time of standby mode, and the four charge pump circuits are driven with a short period at the time of active mode. Therefore, a layout area can be reduced compared with a case where a charge pump circuit for standby mode and a charge pump circuit for active mode are provided separately.
Claims4
An internal voltage generation circuit for generating an internal power supply voltage based on an external power supply voltage in a semiconductor device that has a standby mode and an active mode, comprising:
- a clock generation circuit that generates a first charge pump clock signal at the time of standby mode and generates second and third charge pump clock signals of a short period that is shorter than that of the first charge pump clock signal at the time of active mode;
- a first charge pump circuit that is driven by an external power supply voltage and supplies electric charges to a line of the internal power supply voltage in response to the first and second charge pump clock signals;
- and
- a second charge pump circuit that is driven by the external power supply voltage and supplies electric charges to the line of the internal power supply voltage in response to the third charge pump clock signal.
Dependencies are inferred from the claim text.