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US 2014/0232448 A1Published application
Semiconductor integrated circuit
AssigneeSony Corporation
InventorHiromi Ogata
Life of this patent
Estimating the term…
Abstract
A semiconductor integrated circuit including: a circuit block having an internal voltage line; an annular rail line forming a closed annular line around the circuit block and supplied with one of a power supply voltage and a reference voltage; and a plurality of switch blocks arranged around the circuit block along the annular rail line, the plurality of switch blocks each including a voltage line segment forming a part of the annular rail line and a switch for controlling connection and disconnection between the voltage line segment and the internal voltage line.
Claims16
A semiconductor integrated circuit comprising:
- a switch (SWT, 20N, 20P) in a switch wiring layer, a buffer circuit (BUF) being electrically connected to the switch {FIGS. 5, 7, 8A, 8B, 9A, 9B, 11, 13A, 13B, 14A, 14B};
- an electrically-conductive electrode line (3, 21) in a line wiring layer (6M), the electrode line (3, 21) being between the buffer circuit (BUF) and a power shutoff object circuit block (1){FIGS. 5, 10, 13A, 13B, 14A, 14B};
- an electrically-conductive virtual line (3V, 21V) in the line wiring layer (6M), the virtual line (3V, 21V) being between the electrode line (3, 21V) and the power shutoff object circuit block (1){FIGS. 5, 8A, 8B, 9A, 9B, 10, 13A, 13B, 14A, 14B}.
Dependencies are inferred from the claim text.