Integrated circuits and methods of forming the same with multi-level electrical connection

A method of forming an integrated circuit, the method comprising:

• providing a substrate, wherein the substrate comprises an electrical contact disposed therein;
• forming a first dielectric layer over the substrate and the electrical contact;
• patterning a metal-containing layer over the first dielectric layer to form a patterned metal-containing layer, wherein at least a first portion of the patterned metal-containing layer is disposed over the first dielectric layer and wherein a second portion of the patterned metal-containing layer has a landing surface generally disposed along a common plane with a contact surface of the electrical contact, and wherein the patterned metal-containing layer is absent in regions of the first dielectric layer over the electrical contact;
• forming a second dielectric layer over the patterned metal-containing layer;
• concurrently etching a first via in the first dielectric layer and the second dielectric layer over the electrical contact and a second via in the second dielectric layer over the patterned metal-containing layer with a first etchant;
• concurrently filling the first via and the second via with an electrically-conductive material to form a first interconnect in electrical communication with the electrical contact and a second interconnect in electrical communication with the patterned metal-containing layer.

An integrated circuit comprising:

• a substrate comprising an electrical contact disposed therein;
• a first dielectric layer disposed over the substrate and the electrical contact;
• a patterned metal-containing layer disposed over the first dielectric layer, wherein at least a first portion of the patterned metal-containing layer is disposed over the first dielectric layer, and wherein the patterned metal-containing layer is absent in regions of the first dielectric layer over the electrical contact;
• a second dielectric layer disposed over the patterned metal-containing layer and over regions of the first dielectric layer free from the patterned metal-containing layer;
• a first via defined in the first dielectric layer and the second dielectric layer over the electrical contact and a second via defined in the second dielectric layer over the patterned metal-containing layer, wherein the electrical contact defines a bottom of the first via and the patterned metal-containing layer defines a bottom of the second via;
• a first interconnect comprising an electrically-conductive material disposed in the first via and in electrical communication with the electrical contact;
• and
• a second interconnect comprising the electrically-conductive material disposed in the second via and in electrical communication with the patterned metal-containing layer.