Device Bond Pads Over Process Control Monitor Structures in a Semiconductor Die

A method of manufacturing a semiconductor die, the method comprising:

• forming a semiconductor substrate having an edge region surrounding an active region, the active region containing devices of an integrated circuit;
• forming interconnect wiring over the active region in an interlayer dielectric and in electrical connection with the devices in the active region;
• forming ancillary wiring over the edge region in the interlayer dielectric and in isolation from the interconnect wiring and the devices in the active device region;
• forming a passivation on the interlayer dielectric;
• forming a plurality of bond pads over the interconnect wiring and in electrical connection to the interconnect wiring through openings in the passivation over the active region;
• and
• forming a plurality of additional bond pads over the ancillary wiring and in electrical connection to the interconnect wiring through additional openings in the passivation over the active region.

A method of processing a semiconductor wafer, the method comprising:

• forming a plurality of semiconductor dies in the semiconductor wafer, each semiconductor die having an active region containing devices of an integrated circuit and an edge region surrounding the active region, adjacent ones of the semiconductor dies being separated by a scribe line;
• forming interconnect wiring over the active region of each semiconductor die in an interlayer dielectric;
• forming ancillary wiring over the edge region of each semiconductor die in the interlayer dielectric;
• forming a passivation on the interlayer dielectric;
• forming a plurality of bond pads over the interconnect wiring of each semiconductor die, the bond pads of each semiconductor die being in electrical connection with the interconnect wiring of that semiconductor die;
• and
• forming a plurality of additional bond pads over the ancillary wiring of each semiconductor die, the additional bond pads of each semiconductor die being in electrical connection with the interconnect wiring of that semiconductor die.