Semiconductor grid array package
AssigneeFreescale Semiconductor, Inc.
InventorsFui Yee Lim, Weng Foong Yap
Life of this patent
Estimating the term…
Abstract
A semiconductor grid array package has a first housing member with a cavity that has a cavity floor and cavity walls. A semiconductor die is affixed to the cavity floor. A second housing member is molded to the first housing member and covers an interface surface of the die. Electrically conductive runners are mounted to an external surface of the second housing member. The runners have a wire contacting area and an external connector contacting area. Bond wires are selectively bonded to the external connection pads of the semiconductor die and selectively connected to the wire contacting area of the runners. External electrical connectors are mounted to a designated external connector contacting area.
Claims20
A semiconductor grid array package, comprising:
- a first housing member with a cavity therein, the cavity having a cavity floor at least partially surrounded by cavity walls;
- a semiconductor die having a mounting surface and an opposite interface surface with external connection pads, wherein the mounting surface is affixed to the cavity floor;
- a second housing member molded to the first housing member and covering at least the interface surface;
- a plurality of electrically conductive runners mounted to an external surface of the second housing member, the runners having a wire contacting area and an external connector contacting area;
- bond wires selectively bonded to the external connection pads of the semiconductor die and the wire contacting areas of the runners;
- and
- external electrical connectors mounted to the external connector contacting areas of the runners.
A method for assembling a grid array package, comprising:
- providing a die carrier with a cavity therein, the die carrier providing a first housing member and wherein the cavity has a cavity floor at least partially surrounded by cavity walls;
- placing a semiconductor die in the cavity, the semiconductor die having a mounting surface and an opposite interface surface with external connection pads, wherein the mounting surface is fixed to the cavity floor;
- selectively bonding bond wires to the external connection pads;
- molding a second housing member to the die carrier so that the second housing member covers the interface surface and lengths of the bond wires;
- depositing a plurality of electrically conductive runners to an external surface of the second housing member, the runners having a wire contacting area and an external connector contacting area, wherein the bond wires are selectively connected to a said wire contacting area;
- and
- mounting external electrical connectors to a respective external connector contacting area.
Dependencies are inferred from the claim text.