Semiconductor package with inner and outer leads

A semiconductor die package, comprising:

• a plurality of outer leads each having an outer lead external connection section and an outer lead bonding section;
• a plurality of inner leads spaced from the outer leads, each of the inner leads having an inner lead external connection section spaced and downset from an inner lead bonding section;
• a non-electrically conductive die mount molded onto upper surface areas of each inner lead external connection section;
• a semiconductor die mounted on the non-electrically conductive die mount;
• bond wires selectively electrically connecting bonding pads of the die to at least one inner lead bonding section and at least one outer lead bonding section;
• and
• a mold compound covering at least part of the semiconductor die, the bond wire, and the outer and inner lead bonding sections, wherein both the mold compound and the non-electrically conductive die mount form an underside of the package,
• wherein the inner lead external connection section has a planar inner lead external mounting surface that is co-planar with a planar outer lead external mounting surface of the outer lead external connection section.

A method for manufacturing a semiconductor die package, the method including:

• providing a lead frame assembly with plurality of outer leads each having an outer lead external connection section and an outer lead bonding section, and a plurality of inner leads having an inner lead external connection section downset from an inner lead bonding section, and wherein there is a non-electrically conductive die mount molded onto upper surface areas of each inner lead external connection section;
• mounting a semiconductor die on the non-electrically conductive die mount;
• selectively electrically connecting bonding pads of the semiconductor die to the inner or outer lead bonding sections;
• and
• enclosing the semiconductor die, and each outer and inner lead bonding section with a mold compound to thereby provide the semiconductor die package.