Semiconductor device having sufficient process margin and method of forming same
AssigneeSamsung Electronics Co., Ltd.
InventorsMan-Hyoung RYOO, Gi-Sung YEO, Si-Hyeung LEE, Gyu-Chul KIM, Sung-Gon JUNG, Chang-Min PARK, Hoo-Sung CHO
Life of this patent
Estimating the term…
Abstract
According to some embodiments of the invention, a substrate doped with a P type impurity is provided. An N type impurity is doped into the substrate to divide the substrate into a P type impurity region and an N type impurity region. Active patterns having a first pitch are formed in the P type and N type impurity regions. Gate patterns having a second pitch are formed on the active patterns in a direction substantially perpendicular to the active patterns. Other embodiments are described and claimed.
Claims6
1-12. (canceled)
A semiconductor device comprising:
- impurity regions provided to a unit cell region of a substrate;
- a first active pattern and a second active pattern disposed in the impurity regions, the first active pattern and the second active pattern having a first pitch;
- and
- gate patterns disposed on at least one of the first active pattern and the second active pattern in a direction substantially perpendicular to the first active pattern and the second active pattern, the gate patterns having a second pitch, wherein
- the first pitch indicates the shortest distance between a first side of the first linear active pattern and a first side of the second linear pattern, and the first pitch is substantially identical to the second pitch.
Dependencies are inferred from the claim text.