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US 2014/0231902 A1Published application
Vertical Tunneling Field-Effect Transistor Cell
AssigneeTaiwan Semiconductor Manufacturing Company, Ltd.
InventorsHarry-Hak-Lay Chuang, Cheng-Cheng Kuo, Ming Zhu
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Abstract
A tunneling field-effect transistor (TFET) device is disclosed. The TFET device includes a source contact on the source region, a plurality of gate contacts at a planar portion of a gate stack and a plurality of drain contacts disposed on a drain region. The source contact of the TFET device aligns with other two adjacent source contacts of other two TFET devices such that each source contact locates in one of three angles of an equilateral triangle.
Claims20
A semiconductor device comprising:
- a substrate;
- a protrusion structure disposed over the substrate and protruding out of the plane of substrate;
- a gate stack disposed over the substrate, wherein the gate stack having a planar portion, which is symmetrically to the protrusion structure and parallel to the surface of substrate and a gating surface, which wraps around a middle portion of the frustoconical protrusion structure;
- and
- a source region disposed as a top portion of the frustoconical protrusion structure, including overlapping with a top portion of the gating surface of the gate stack;
- a drain region disposed over the substrate symmetrically adjacent to the protrusion structure and extending to a bottom portion of the protrusion structure as a raised drain region;
- a source contact disposed on the source region;
- a gate contact disposed on the planar portion of the gate stack;
- a drain contact disposed on the drain region;
- and
- the source contact aligns with other two source contacts of two adjacent semiconductor devices such that each source contact locates in one of three angles of an equilateral triangle.
8 more elements
A semiconductor device comprising:
- a semiconductor substrate;
- a cylinder shape protrusion disposed over the substrate and protruding out of the plane of semiconductor substrate;
- a source region at a top portion of the protrusion;
- a high-k/metal gate (HK/MG) disposed over the semiconductor substrate, wherein the HK/MG having a planar portion, which is symmetrically to the cylinder protrusion and parallel to the surface of semiconductor substrate and a gating surface, which wraps around a middle portion of the cylinder protrusion, including overlapping with the source region;
- a drain region disposed over the semiconductor substrate symmetrically adjacent to the cylinder protrusion and extending to a bottom portion of the cylinder protrusion as a raised drain region;
- an isolation dielectric layer disposed between the planar portion of the HK/MG and the drain region, over the source region and the drain region;
- a source contact disposed at the source region;
- a gate contact aligns to the cylinder protrusion;
- a drain contact disposed at the drain region;
- and
- the source contact aligns with other two source contacts of two adjacent semiconductor devices such that each source contact locates in one of three angles of an equilateral triangle.
8 more elements
A semiconductor device comprising:
- first, second and third cylinder-shaped tunneling field-effect transistors (TFETs), each TFET having:
- a source contact;
- a gate contact;
- and
- a drain contact.
- wherein the source contact of the first cylinder-shape TFET aligns with the source contacts of the second and third cylinder-shape TFET such that each source contact is located at a vertex of an equilateral triangle;
- and
- wherein the gate contacts and drain contacts of the three TFETS align symmetrically with each other along more than one straight line.
5 more elements
Dependencies are inferred from the claim text.