High Capacitance Multilayer with High Voltage Capability
AssigneeKemet Electronics Corporation
InventorsJohn Bultitude, James R. Magee, Lonnie G. Jones
Life of this patent
Estimating the term…
Abstract
New designs for multilayer ceramic capacitors are described with high voltage capability without the need of coating the part to resist surface arc-over. One design combines a high overlap area for higher capacitance whilst retaining a high voltage capability. A variation of this design has increased voltage capability over this design as well as another described in the prior art although overlap area and subsequently capacitance is lowered in this case. These designs are compared to the prior art in examples below.
Claims13
1-18. (canceled)
A method of forming a multilayered ceramic capacitor comprising:
- printing a pattern of print regions of conductive material on a series of sheets wherein each print region of said print regions comprises a bulk region and a secondary region wherein said secondary region has a region width which is less than a bulk width of said bulk region;
- forming a layered assembly by the steps of:
- overlaying a first sheet over a bottom sheet in parallel offset fashion wherein at least one said print region of said bottom sheet is overlapped but laterally offset from a print region of said first sheet with a dielectric precursor between said overlapped but laterally offset print regions;
- overlaying a second sheet over said first sheet wherein at least one said print region of said second sheet is overlapped but offset from said print region of said first sheet and said print region of said bottom sheet with a dielectric between said overlapped but laterally offset print regions;
- overlaying additional sheets with alternating sheets having said print region aligned with said first sheet and said second sheet respectively with a dielectric between said overlapped but laterally offset print regions,
- overlaying a top sheet with said print region aligned with said bottom sheet with a dielectric between said overlapped but laterally offset print regions;
- dicing said un-fired, compacted sheets to isolate a layered structure with print regions of said first layer forming first internal conductors;
- print regions of said second layer forming second internal conductors and print regions of said top sheet and said bottom sheet forming shield layers;
- firing said layered assembly to remove organic materials and fuse said sheets to form a fired monolith;
- forming a first external termination in electrical contact with said first internal conductors on said fired monolith;
- and
- forming a second external termination in electrical contact with said second internal conductors on said fired monolith.
Dependencies are inferred from the claim text.