Response to tamper detection in a memory device

A method comprising:

• receiving a tamper-attempt indication corresponding to a memory device that includes an array of memory cells;
• disabling a memory operation within the memory device based on the tamper-attempt indication received;
• and
• generating a current on the memory device in response to an attempt to perform the memory operation that is disabled.

A memory device, comprising:

• an array of memory cells arranged in rows and columns;
• tamper detection circuitry configured to detect a tamper-attempt;
• memory access circuitry coupled to the array of memory cells, the memory access circuitry configured to read data from the memory cells and write data to the memory cells in response to control information received by the memory device;
• control circuitry coupled to the tamper detection circuitry and the memory access circuitry, the control circuitry configured to disable a selected memory operation in response to detection of the tamper-attempt;
• and
• current generation circuitry coupled to the control circuitry, the current generation circuitry configured to generate current on the memory device that approximates current generated during performance of the selected memory operation when not disabled.