Method for checking an m out of n code

A method for checking an m out of n code, comprising:

• providing at least one code checker;
• assigning to the code checker at least one code reducer;
• in the at least one code reducer, carrying out a reduction of a code word width to in each case half until one of a 1 out of x (x=n/2, n/4, n/8 . . . ) code and another code which is not reducible further in this way is provided;
• connecting each of the at least one code reducer to different bits of a counter;
• checking the at least one of the 1 out of x code and the code which is not reducible further;
• and
• checking signal pairs of each of the at least one code reducer.

A circuit system for checking an m out of n code, comprising:

• a code checker, to which at least one code reducer is assigned, at least one of the at least one code reducers including multiple full adders, wherein:
• the first code reducer uses n/2 full adders,
• a summation bit of one full adder is led in each case to a transfer input of the next full adder,
• n/2 transfer bits of the n/2 full adders are output,
• a transfer input of a first full adder is connected to an output of a first counter bit and this signal, with a summation output of the last full adder, form a first signal pair.