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US 2014/0229954 A1Published application
Systems and Methods for Data Quality Based Variable Data Process Scheduling
AssigneeLSI Corporation
InventorsShaohua Yang, Fan Zhang, Jun Xiao, Kaitlyn T. Nguyen
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Abstract
Systems, circuits, devices and/or methods related to systems and methods for data processing, and more particularly to systems and methods for quality based scheduling processing of data sets.
Claims20
A data processing system, the data processing system comprising:
- an input buffer operable to maintain a data set, wherein the data set is associated with a priority indication;
- and
- a process scheduling circuit operable to:
- select the data set for processing by a data detector circuit based at least in part on the priority indication, wherein the data detector circuit is operable to apply a data detection algorithm to the data set to yield a detected output;
- and
- modify the priority indication based at least in part on a number of times the data set is processed through both the data detector circuit and a data decoder circuit, wherein the data decoder circuit is operable to apply a data decode algorithm to a decoder input derived from the detected output to yield a decoded output.
3 more elements
A method for data processing, the method comprising:
- storing a data set to an input buffer, wherein the data set is associated with a priority indication;
- selecting the data set for processing by a data detector circuit based at least in part on the priority indication, wherein the data detector circuit is operable to apply a data detection algorithm to the data set to yield a detected output;
- and
- modifying the priority indication based at least in part on a number of times the data set is processed through both the data detector circuit and a data decoder circuit, wherein the data decoder circuit is operable to apply a data decode algorithm to a decoder input derived from the detected output to yield a decoded output.
1 more element
A storage device, the storage device comprising:
- a storage medium;
- a head assembly disposed in relation to the storage medium and operable to provide a sensed signal corresponding to information on the storage medium;
- a read channel circuit including:
- an analog to digital converter circuit operable to sample an analog signal derived from the sensed signal to yield a series of digital samples;
- an equalizer circuit operable to equalize the digital samples to yield a data set;
- an input buffer operable to maintain at least the data set, wherein the data set, wherein the data set is associated with a priority indication;
- a process scheduling circuit operable to:
- select the data set for processing by a data detector circuit based at least in part on the priority indication, wherein the data detector circuit is operable to apply a data detection algorithm to the data set to yield a detected output;
- and
- modify the priority indication based at least in part on a number of times the data set is processed through both the data detector circuit and a data decoder circuit, wherein the data decoder circuit is operable to apply a data decode algorithm to a decoder input derived from the detected output to yield a decoded output.
7 more elements
Dependencies are inferred from the claim text.