Llr computation device and error correction decoding device
AssigneeMitsubishi Electric Corporation
InventorsKenya Sugihara, Wataru Matsumoto
Life of this patent
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Abstract
A two-reference-point-pair determining unit 101 determines two reference point pairs by selecting two transmission symbol points with their LLR computation target bit being 0 and two transmission symbol points with their LLR computation target bit being 1. An LLR computation unit 113 assigns weights to the two LLRs calculated for the two reference point pairs, respectively, followed by adding them, and further adds to the addition result a correction term that may be zero sometimes, thus computing LLR for the two reference point pairs.
Claims19
An LLR computation device of a receiver for receiving a signal that is generated by modulating an error-correcting-coded bit string by a multivalued modulation scheme and is transmitted to the receiver, the LLR computation device comprising:
- a reference-point-pair determining unit that determines two reference point pairs by selecting two transmission symbol points with their LLR (Log-Likelihood Ratio) computation target bit being 0 and two transmission symbol points with their LLR computation target bit being 1;
- and
- an LLR computation unit that assigns weights to two LLRs calculated for the two reference point pairs, respectively, followed by adding them, and that further adds to the addition result a correction term that may be zero sometimes, thereby computing an LLR for the two reference point pairs.
An LLR computation device of a receiver for receiving a signal that is generated by modulating an error-correcting-coded bit string by a multivalued modulation scheme and is transmitted to the receiver, the LLR computation device comprising:
- a reference-point-pair determining unit that determines two reference point pairs by selecting two transmission symbol points with their LLR computation target bit being 0 and two transmission symbol points with their LLR computation target bit being 1;
- a square difference calculation unit that calculates a difference between the square of a distance from a received signal point to a first reference point and the square of a distance from the received signal point to a second reference point, the first reference point and the second reference point having the same target bit;
- and
- an LLR computation unit that calculates an LLR by a prescribed LLR computation expression in accordance with the value the square difference calculation unit calculates.
An LLR computation device of a receiver for receiving a signal that is generated by modulating an error-correcting-coded bit string by a multivalued modulation scheme and is transmitted to the receiver, the LLR computation device comprising:
- a reference-point-pair determining unit that determines three reference point pairs by selecting three transmission symbol points with their LLR computation target bit being 0 and three transmission symbol points with their LLR computation target bit being 1;
- and
- an LLR computation unit that assigns weights to three LLRs calculated for the three reference point pairs, respectively, followed by adding them, and that further adds to the addition result a correction term that may be zero sometimes, thereby computing an LLR for the three reference point pairs.
An LLR computation device of a receiver for receiving a signal that is generated by modulating an error-correcting-coded bit string by a multivalued modulation scheme and is transmitted to the receiver, the LLR computation device comprising:
- a reference-point-pair determining unit that determines a plurality of reference point pairs by selecting four or more transmission symbol points with their LLR computation target bit being 0 and four or more transmission symbol points with their LLR computation target bit being 1;
- and
- an LLR computation unit that assigns weights to the LLRs calculated for the plurality of reference point pairs, respectively, followed by adding them, and that further adds to the addition result a correction term that may be zero sometimes, thereby computing an LLR.
Dependencies are inferred from the claim text.