Failure recovery memory devices and methods
AssigneeMicron Technology, Inc.
InventorDavid R. Resnick
Life of this patent
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Abstract
Memory devices and methods are described that include serially chained memory devices. In one or more of the configurations shown, a serial chain of memory devices includes a number of memory devices, and an error recovery device at an end of the chain. In one configuration shown, the serial chain of memory devices includes a chain of devices where each device is a stacked die memory device. Methods are described that show using the error recovery device in write operations and data recovery operations.
Claims19
A memory system, comprising:
- a plurality of memory devices in a serial chain each memory device in the number of memory devices including:
- a request input path configured for serial communication through the memory device;
- a response output path configured for serial communication through the memory device;
- a first logic block coupled to the input path to form error recovery data;
- a second logic block coupled to the output path to recover data using the error recovery data;
- and
- a selectable mode to assign any chosen memory device in the plurality of memory devices as an error recovery device.
The memory system of claim 4, wherein the plurality of memory devices includes a plurality of flash memory devices.
A memory system, comprising:
- a plurality of memory devices in a serial chain each memory device in the number of memory devices including:
- a memory request input;
- a memory request output configured to pass on memory requests to a downstream memory device;
- at least one ECC logic block;
- and
- a selectable mode to assign any chosen memory device in the plurality of memory devices as an error recovery device.
A solid state memory device, comprising:
- a memory request input;
- a memory request output configured to pass on memory requests to a downstream memory device;
- and
- at least one ECC logic block, the solid state memory device having a selectable mode to assign the solid state memory device as an error recovery device.
Dependencies are inferred from the claim text.