Malware and tamper resistant computer architecture
AssigneeRaytheon BBN Technologies Corp.
InventorsThomas Gilbert Roden, III, John-Francis Mergen, Carl Marshall Elliot Powell
Life of this patent
Estimating the term…
Loading patent…
AssigneeRaytheon BBN Technologies Corp.
InventorsThomas Gilbert Roden, III, John-Francis Mergen, Carl Marshall Elliot Powell
Estimating the term…
Generally described herein are methods and systems for enhanced tamper and malware resistant computer architectures. A system for enhanced tamper and malware resistance can include a harvardizer configured to receive comingled instructions and data and produce separated instructions and data. A data memory can be configured to receive the separated data. An instruction memory that is physically separate from the data memory can be configured to receive the separated instructions. The system can include one or more computer processors that can be configured to execute the separated instructions and data. The system can include one or more encryptors or decryptors to help thwart injection based attacks.
A computer system comprising:
A computer configured to receive instructions and data in a Von Neumann architecture format, convert the instructions and data to a Harvard architecture format, and execute the instructions and data in the Harvard architecture format.
A method comprising:
A system comprising:
Dependencies are inferred from the claim text.