Extensible execution unit interface architecture
AssigneeInternational Business Machines Corporation
InventorsAdam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
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AssigneeInternational Business Machines Corporation
InventorsAdam J. Muff, Paul E. Schardt, Robert A. Shearer, Matthew R. Tubbs
Estimating the term…
A method and circuit arrangement tightly couple together decode logic associated with multiple types of execution units and having varying priorities to enable instructions that are decoded as valid instructions for multiple types of execution units to be forwarded to a highest priority type of execution unit among the multiple types of execution units. Among other benefits, when an auxiliary execution unit is coupled to a general purpose processing core with the decode logic for the auxiliary execution unit tightly coupled with the decode logic for the general purpose processing core, the auxiliary execution unit may be used to effectively overlay new functionality for an existing instruction that is normally executed by the general purpose processing core, e.g., to patch a design flaw in the general purpose processing core or to provide improved performance for specialized applications.
A method of executing instructions in a processing unit of the type including a core with at least one fixed point execution unit and at least one auxiliary execution unit external to the core, wherein the auxiliary execution unit has a higher priority than the fixed point execution unit, the method comprising:
-17. (canceled)
A method of executing instructions in a processing unit, the method comprising:
A method of patching a processing unit design, wherein the processing unit design defines a core including first decode logic and a first execution unit, wherein the first decode logic is configured to decode an instruction for the first execution unit and forward the instruction to the first execution unit for execution thereby, and wherein the core includes a design flaw that causes the first execution unit to execute the instruction with sub-optimal performance, the method comprising:
Dependencies are inferred from the claim text.