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US 2014/0229702 A1Published application
Concurrent memory operations
AssigneeMicron Technology, Inc.
InventorsLUCA PORZIO, RODOLPHE SEQUEIRA
Life of this patent
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Abstract
Subject matter disclosed herein relates to performing concurrent memory operations.
Claims20
A method for performing memory operations, comprising:
- unmapping virtual memory addresses corresponding to physical memory locations where a first operation is to be performed;
- performing at least part of the first operation;
- receiving a command for a second operation while performing the first operation;
- determining whether the second operation affects the physical memory locations;
- and
- selecting, based on whether the second operation affects the physical memory locations, whether to suspend performance of the first operation until the second operation is complete or delay the second operation until the first operation is complete;
- wherein the second operation is of a different type from the first operation.
4 more elements
A memory device comprising:
- a memory controller to perform a first operation on a portion of a memory array corresponding to a set of physical addresses;
- and
- a memory management unit (MMU) coprocessor to unmap virtual memory addresses associated with the set of physical addresses, wherein at least one of the memory controller or the memory management unit coprocessor is configured to determine whether to suspend performance of the first operation until the second operation is complete or delay the second operation until the first operation is complete;
- and wherein the second operation is of a different type from the first operation.
1 more element
A system comprising:
- a memory device including a portion of a memory array corresponding to a set of physical addresses;
- a memory controller to perform a first operation on the portion of the memory array;
- a memory management unit (MMU) coprocessor to unmap virtual memory addresses associated with the set of physical addresses, wherein at least one of the memory controller or the memory management unit coprocessor is configured to determine whether to suspend performance of the first operation until the second operation is complete or delay the second operation until the first operation is complete;
- and wherein the second operation is of a different type from the first operation;
- and
- a processor to host one or more applications and to initiate the first operation or the second operation to provide access to the portion of the memory array.
3 more elements
Dependencies are inferred from the claim text.