Conditional prefetching

An apparatus operative to prefetch data for a first memory from a second memory comprising:

• logic operative to track a plurality of fetched memory elements in the second memory and responsive to fetching one of more memory elements from the plurality of memory elements, determine a probability of future fetch requests for one or more of the remaining memory elements from the plurality of memory elements;
• and
• operative to prefetch one or more of the remaining memory elements from the plurality of memory elements based on the determining the probability of future fetch requests.

A non-transitory storage medium comprising executable instructions that when executed cause an integrated circuit design system to produce an integrated circuit that comprises logic operative to track fetched memory elements in each of a plurality of memory segments in a memory wherein the memory segments are aligned and uniformly sized memory segments of a group of aligned and uniformly sized memory segments;

• and wherein the logic is operative to prefetch a remainder of memory elements in a current aligned and uniformly sized memory segment from the memory based on the tracking of fetched memory elements in each of the plurality of memory segments in the group.

An apparatus operative for prefetching data for a first memory from a second memory comprising:

• logic operative to track fetched memory elements in each of a plurality of memory segments in the second memory wherein the memory segments are aligned and uniformly sized memory segments of a group of aligned and uniformly sized memory segments;
• and
• operative to prefetch a remainder of memory elements in a current aligned and uniformly sized memory segment based on the tracking of fetched memory elements in each of the plurality of memory segments in the group.

A method for prefetching data for a first memory from a second memory comprising:

• tracking fetched memory elements in each of a plurality of memory segments in the second memory wherein the memory segments are aligned and uniformly sized memory segments of a group of aligned and uniformly sized memory segments;
• and
• prefetching one or more of a remainder of memory elements in a current aligned and uniformly sized memory segment based on the tracking of the fetched memory elements in each of the plurality of memory segments in the group.

A non-transitory storage medium comprising executable instructions that when executed cause an integrated circuit design system to produce an integrated circuit that comprises

• logic operative to track a plurality of fetched memory elements in the second memory and responsive to fetching one of more memory elements from the plurality of memory elements, determine a probability of future fetch requests for one or more of the remaining memory elements from the plurality of memory elements;
• and
• to prefetch one or more of the remaining memory elements from the plurality of memory elements based on the determining the probability of future fetch requests.

An apparatus operative for prefetching data for a first memory from a second memory comprising:

• logic operative to maintain information relating to memory elements in a group of memory elements fetched from the second memory into the first memory;
• and responsive to fetching one or more memory elements from a segment of memory elements in the group of memory elements, prefetch one or more remaining memory elements in the segment of memory elements from the second memory into the first memory when the information relating to the memory elements in the group of memory elements indicates that a prefetching condition has been satisfied.