Memory Architecture For Dynamically Allocated Manycore Processor

Abstract

Invented hardware logic based methods and systems enable dynamically allocating and assigning an array of processing cores among instances of software programs, based on at least in part on indications of which instances of the programs are ready-to-execute, wherein such an indication for any given program instance is based at least in part on whether its fast-access memory contents are ready for it to execute without it needing at that time access to memories other than its fast-access memory. The invention also provides hardware logic based mechanisms for automating the updating of the fast-access memories for instances of the programs dynamically sharing the array of cores according to control by the program instances via their associated hardware device registers, including while a given program instance whose fast-access memory contents are being updated is not assigned for execution on any of the cores.

Dependencies are inferred from the claim text.