Methods for fabricating integrated circuits with improved semiconductor fin structures

A method for fabricating semiconductor fin structures for integrated circuits comprising:

• forming mandrel structures from a mandrel layer overlying a surface of a semiconductor substrate;
• forming a layer between the mandrel structures;
• forming spacers overlying the layer to define exposed regions of the layer and covered regions of the layer;
• etching the exposed regions of the layer, wherein each covered region of the layer forms a mask segment and each mask segment has a planar upper surface substantially parallel to the surface of the semiconductor substrate;
• removing the mandrel structures;
• and
• etching the semiconductor substrate between mask segments to form the semiconductor fin structures.

A method for fabricating integrated circuits comprising:

• forming mandrel structures overlying a surface of a semiconductor substrate;
• coating the semiconductor substrate with an organic planarizing layer (OPL) and curing the OPL to form a protective layer between the mandrel structures;
• forming spacers around each of the mandrel structures and overlying portions of the protective layer to define exposed regions of the protective layer and covered regions of the protective layer;
• etching the exposed regions of the protective layer using the spacers and the mandrel structures as a mask;
• removing the mandrel structures and the spacers, wherein the covered regions of the protective layer form mask segments;
• and
• etching the semiconductor substrate exposed between mask segments to form semiconductor fin structures.