Semiconductor device and method for fabricating the same

A method for fabricating a semiconductor device, comprising:

• sequentially forming an insulating layer and a silicon layer on a substrate, wherein the substrate includes at least one element isolation region, a first active area and a second active area defined in the substrate by the at least one element isolation region;
• forming a mask pattern including a plurality of openings on the silicon layer, wherein the openings are formed on the first active area and the second active area, respectively;
• patterning the insulating layer and the silicon layer by etching using the mask pattern as an etching mask to form a first gate pattern and a dummy gate pattern on the first active area and the second active area of the substrate, respectively, wherein the first gate pattern includes a first gate insulating layer and a first silicon gate electrode disposed on the first gate insulating layer;
• forming a spacer on a side surface of the first gate pattern and the dummy gate pattern;
• forming a buried insulating layer to surround the first gate pattern and the dummy gate pattern and expose an upper surface of the first gate pattern and an upper surface of the dummy gate pattern;
• forming a gate silicide on the first silicon gate electrode;
• removing the dummy gate pattern to form a trench in the buried insulating layer to expose a surface of the substrate in the second active area;
• forming a second gate pattern including a second gate insulating layer and a metal gate electrode sequentially stacked on the exposed surface of the substrate in the trench in the second active area, wherein the second gate insulating layer includes a chemical silicon oxide layer and a high-k gate insulating layer disposed on the chemical silicon oxide layer, and wherein the second gate insulating layer has a thickness smaller than a thickness of the first gate insulating layer;
• and
• forming a third gate pattern including a third gate insulating layer and a second silicon gate electrode sequentially stacked on the at least one element isolation region of the substrate.