Lateral super junction device with high substrate-gate breakdown and built-in avalanche clamp diode
AssigneeAlpha and Omega Semiconductor Incorporated
InventorsMadhur Bobde, Lingpeng Guan, Anup Bhalla, Hamza Yilmaz
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Abstract
A lateral super junction JFET is formed from stacked alternating P type and N type semiconductor layers over a P-epi layer supported on an N+ substrate. An N+ drain column extends down through the super junction structure and the P-epi to connect to the N+ substrate to make the device a bottom drain device. N+ source column and P+ gate column extend through the super junction but stop at the P-epi layer. A gate-drain avalanche clamp diode is formed from the bottom the P+ gate column through the P-epi to the N+ drain substrate.
Claims9
A method of forming a semiconductor power device comprising:
- forming a bottom semiconductor layer of a first conductivity type, and an intermediate semiconductor layer of a second conductivity type below said super junction structure and above said bottom semiconductor layer followed by forming a super junction structure near a top surface of a semiconductor substrate by forming stacking laterally layers of alternating conductivity types of a first and second conductivity type;
- forming a gate column of a second conductivity type extending down through the super junction structure;
- forming a source column and a drain column of a first conductivity type extending through the super junction structure with the drain column extending through the super junction structure and electrically connected to the bottom semiconductor layer.
The method of 1 further comprising:
- configuring the source, gate and drain columns to function as a JFET;
- and
- forming a MOSFET in the semiconductor device in cascode circuit configuration with the JFET.
Dependencies are inferred from the claim text.