Semiconductor structure with lamella defined by singulation trench
AssigneeInfineon Technologies AG
InventorsBoris Binder, Bernd Foeste, Thoralf Kautzsch, Stefan Kolb, Marco Mueller
Life of this patent
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Abstract
A method for fabricating a semiconductor structure includes etching a first opening into a substrate; etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench; fabricating a sense element for sensing a deflection of the lamella; and singulating the semiconductor structure at the chip singulation trench.
Claims16
A method for fabricating a semiconductor structure, the method comprising:
- etching a first opening into a substrate;
- etching a chip singulation trench into the substrate to define a lamella between the first opening and the chip singulation trench;
- fabricating a sense element for sensing a deflection of the lamella;
- and
- singulating the semiconductor structure at the chip singulation trench.
A method for fabricating a semiconductor structure, the method comprising:
- forming a circumferential trench surrounding an inner structure in and near a peripheral edge of a substrate, at least one wall of the circumferential trench facing the peripheral edge defining a lamella;
- and
- insulating the inner structure with respect to the substrate at a portion of the inner structure supporting the inner structure at the substrate.
A method for fabricating a semiconductor structure, the method comprising:
- etching a first opening into a substrate;
- etching a second opening into the substrate to define a lamella between the first opening and the second opening;
- fabricating a sense element for sensing a deflection on the lamella;
- closing at least one of the first opening and the second opening;
- wherein at least one of the first opening and the lamella has a tapered horizontal cross-section.
A method for fabricating a semiconductor structure, comprising:
- etching a first opening into a substrate;
- applying a liner material to walls of the first opening;
- after applying the liner material;
- filling the first opening with polysilicon;
- etching at least a part of the liner material thereby leaving a gap between the polysilicon and at least part of the walls of the first opening.
A method for fabricating a semiconductor structure, the method comprising:
- creating an electrically insulating layer at a first main surface of a semiconductor substrate;
- providing semiconductor material on the electrically insulating layer;
- etching a first opening into the provided semiconductor material and the electrically insulating layer;
- and
- etching a second opening into the provided semiconductor material and the electrically insulating layer to define a lamella in the semiconductor material between the first opening and the second opening.
Dependencies are inferred from the claim text.