Microelectronic package with stacked microelectronic units and method for manufacture thereof

A method of fabricating a microelectronic package comprising:

• stacking a first microelectronic unit onto a second microelectronic unit,
• the first microelectronic unit including a semiconductor chip having first chip contacts, an encapsulant contacting an edge of the semiconductor chip, and first unit contacts exposed at a surface of the encapsulant and electrically connected with the first chip contacts,
• the second microelectronic unit including a semiconductor chip having second chip contacts at a surface thereof, an encapsulant contacting an edge of the semiconductor chip of the second microelectronic unit and having a surface extending away from such edge, the surfaces of the semiconductor chip and the encapsulant of the second microelectronic unit defining a face of the second microelectronic unit;
• and
• forming bond wires electrically connecting the first unit contacts with package terminals at the face of the second microelectronic unit, the package terminals being electrically connected with the second chip contacts through metalized vias and traces formed in contact with the second chip contacts.