Multi-port channelized optical line terminal
AssigneeBroadcom Corporation
InventorsRyan Hirth, Sourigno Outsama, Ngo Ho, Simon Ray Lee
Life of this patent
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Abstract
A method and system for channelizing a Passive Optical Network (PON) Media Access Controller (MAC) includes increasing a clock rate of each of one or more PON MAC(s) to create communication lanes each comprising a plurality of N channels. The PONs are channelized according to NX, where N equals a number of ports supported by the MAC and X equals a designated operating PON MAC clocking rate allowing for leveraging of existing Passive Optical Network (PON) infrastructures to provide a more power efficient and physically smaller MAC layer for OLTs.
Claims20
A method for channelizing a Passive Optical Network (PON) Media Access Controller (MAC) comprising:
- receiving network traffic data through a network switch;
- transmitting the network traffic data to one or more PON MAC(s) from the network switch;
- and
- increasing a clock rate of each of the one or more PON MAC(s) to channelize the one or more PON MAC(s) according to NX, where N equals a number of ports supported by each of the one or more PON MAC(s) and X equals a designated operating PON MAC clocking rate.
A system incorporating one or more channelized Passive Optical Network (PON) Media Access Controllers (MACs), the system comprising:
- a PON network switch;
- one or more channelized MAC(s) connected to the PON network switch, each of the one or more channelized MAC(s) supporting N channels;
- one or more error correction modules connected to the one or more channelized MAC(s);
- a plurality of physical coding sublayers (PCSs) forming a PON lane comprising the N channels, and
- a serializer/deserializer (SERDES) interfacing with the PON lane.
A multi-port Optical Line Terminal (OLT) incorporating one or more channelized Passive Optical Network (PON) Media Access Controllers (MACs) comprising:
- a PON network switch;
- one or more channelized MACs connected to the PON network switch, each of the one or more channelized MACs supporting N channels;
- one or more error correction and encryption modules connected to the one or more channelized MACs;
- a plurality of physical coding sublayers (PCSs) forming one or more PON lane(s) comprising the N channels for each of the one or more channelized MACs, and
- a serializer/deserializer (SERDES) interfacing with each of the one or more PON lane(s).
Dependencies are inferred from the claim text.