Signal processing circuit and method
AssigneeFujitsu Limited
InventorHideki FURUDATE
Life of this patent
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Abstract
A signal processing circuit includes a PLL circuit configured to lock to a frequency contained in an input signal, a signal generating circuit configured to detect a direct-current component of a signal that is obtained by shifting frequencies of the input signal by a displacement equal to the locked frequency, and to generate a signal that has an amplitude responsive to the detected direct-current component and that has the same frequency and phase as a signal component of the locked frequency of the input signal, and a subtraction circuit configured to subtract the signal generated by the signal generating circuit from the input signal.
Claims8
A signal processing circuit, comprising:
- a PLL circuit configured to lock to a frequency contained in an input signal;
- a signal generating circuit configured to detect a direct-current component of a signal that is obtained by shifting frequencies of the input signal by a displacement equal to the locked frequency, and to generate a signal that has an amplitude responsive to the detected direct-current component and that has the same frequency and phase as a signal component of the locked frequency of the input signal;
- and
- a subtraction circuit configured to subtract the signal generated by the signal generating circuit from the input signal.
A signal processing method, comprising:
- causing a PLL circuit to lock to a frequency contained in an input signal;
- detecting a direct-current component of a signal that is obtained by shifting frequencies of the input signal by a displacement equal to the locked frequency;
- generating a signal that has an amplitude responsive to the detected direct-current component and that has the same frequency and phase as a signal component of the locked frequency of the input signal;
- and
- subtracting the generated signal from the input signal.
Dependencies are inferred from the claim text.