Memory Read Techniques using Miller Capacitance Decoupling Circuit

A memory device, comprising:

• a sense amplifier including a pair of cross-coupled inverters which establish first and second sensing nodes at which the pair of cross-coupled inverters cooperatively reinforce a data state read from a memory cell;
• and
• a sense amplifier output buffer including a first output buffer inverter having an input terminal coupled to the first sensing node and a second output buffer inverter having an input terminal coupled to the second sensing node;
• wherein at least one of the first and second output buffer inverters include a current path having a first pull-up element arranged in series with a first pull-down element with an output node arranged between a drain of the first pull-up element and a drain of the first pull-down element, wherein a Miller capacitance decoupling circuit is arranged between the drain of the pull-up element and the drain of the pull-down element.

A method of sensing data from a memory cell, comprising:

• decoupling a memory cell from a sense amplifier;
• while the memory cell is decoupled from the sense amplifier, accessing complementary storage nodes of the memory cell to establish a voltage differential on complementary data lines, where the established voltage differential corresponds to a data state read from the memory cell;
• coupling the complementary data lines with the established voltage differential to sensing nodes of a sense amplifier to determine the data state read from the memory cell;
• and
• using a sense amplifier output buffer, which includes a Miller capacitance decoupling circuit, to amplify the determined data state.