US 2014/0211553 A1 · LOAD AND SHORT CURRENT MEASUREMENT BY CURRENT SUMMATION TECHNIQUE

Abstract

Methods for monitoring one or more load currents corresponding with one or more voltage regulators used during operation of a semiconductor memory are described. The one or more load currents may be due to the biasing of memory cells within a memory array or due to the presence of shorts between lines in the memory array. In some embodiments, a plurality of load currents corresponding with a plurality of voltage regulators may be monitored in real-time before and during biasing of one or more memory arrays. The plurality of load currents may be monitored using a configurable load current monitoring circuit that uses a current summation technique. The ability to monitor the plurality of load currents before performing a programming operation on a memory array allows for remapping of defective portions of the memory array and modification of programming bandwidth prior to the programming operation.

Claims44

Dependent claims

A method for operating a non-volatile storage system, comprising:

performing a first set of memory operations on one or more memory arrays, the first set of memory operations includes applying a first set of biasing conditions to the one or more memory arrays;
detecting that a load current associated with a voltage regulator biasing at least a portion of the one or more memory arrays during the first set of memory operations is greater than a threshold;
determining a second set of biasing conditions different from the first set of biasing conditions in response to detecting that the load current is greater than the threshold;
and
performing a second set of memory operations on the one or more memory arrays, the second set of memory operations includes applying the second set of biasing conditions to the one or more memory arrays.

2 more elements

A non-volatile storage system, comprising:

one or more memory arrays including one or more memory cells, the one or more memory arrays include one or more control lines connected to the one or more memory cells;
a first voltage regulator, the first voltage regulator generates a first reference voltage;
a current load monitoring circuit, the current load monitoring circuit determines a load current associated with the first voltage regulator, the current load monitoring circuit includes an input current mirroring stage and a current load measuring circuit, the current load measuring circuit regulates a common node of the input current minoring stage to the first reference voltage;
and
one or more managing circuits in communication with the first voltage regulator and the current load monitoring circuit, the one or more managing circuits cause a first set of memory operations to be performed on the one or more memory arrays, the first set of memory operations includes applying the first reference voltage to the one or more control lines, the one or more managing circuits detect that the load current associated with the first voltage regulator during the first set of memory operations is greater than a threshold, the one or more managing circuits cause the first voltage regulator to generate a second reference voltage different from the first reference voltage in response to detecting that the load current is greater than the threshold, the one or more managing circuits cause a second set of memory operations to be performed on the one or more memory arrays, the second set of memory operations includes applying the second reference voltage to the one or more control lines.

2 more elements

A current load monitoring system, comprising:

a first voltage regulator, the first voltage regulator generates a first reference voltage and a pair of voltages for driving a class AB output stage of the first voltage regulator, the first reference voltage drives one or more control lines connected to one or more memory cells;
and
a current load monitoring circuit, the current load monitoring circuit measures a load current associated with the first voltage regulator, the current load monitoring circuit includes an input current mirroring stage and a current load measuring circuit, the input current mirroring stage includes a first transistor and a second transistor sharing a common node, a first voltage of the pair of voltages drives the first transistor and a second voltage of the pair of voltages drives the second transistor, the current load measuring circuit regulates the common node to the first reference voltage, the current load monitoring circuit determines whether the load current is greater than a threshold current value by comparing the load current with the threshold current value.

Dependencies are inferred from the claim text.

Load and short current measurement by current summation technique

Life of this patent

Load and short current measurement by current summation technique

Life of this patent

Abstract

Claims44