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US 2014/0211545 A1Published application
Semiconductor device
AssigneeElpida Memory, Inc.
InventorsKyoichi NAGATA, Yuuji Motoyama
Life of this patent
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Abstract
A semiconductor device includes an equalizing circuit and a control circuit. The equalizing circuit executes an operation of pre-charging the signal input/output line pair used for data inputting/outputting and an operation of equalizing it independently of each other. In case a plurality of data write operations occur in succession, the control circuit halts pre-charge control in the equalizing circuit in the course of consecutive write operations.
Claims16
A semiconductor device, comprising:
- an I/O line pair composed by a first I/O line and a second I/O line;
- a precharge circuit provided between the first and second I/O lines to pre-charge the first and second I/O lines to a first potential in response to a first control signal;
- an equalizing circuit provided between the first and second I/O lines to short-circuit the first and second I/O lines in response to a second control signal;
- and
- a control circuit generating the first and second control signals independently of each other.
2 more elements
A semiconductor device, comprising:
- a word line;
- a bit line pair;
- a memory cell formed at least one of intersections of the word line and two bit lines of the bit line pair;
- a local I/O line pair disposed to intersect the bit line pair;
- a main I/O line pair disposed to intersect the local I/O line pair;
- a first transistor of one conductivity type coupled between the first I/O line and a first power supply line and having a control terminal coupled to a first control line;
- a second transistor of the one conductivity type coupled between the first power supply line and the second I/O line and having a control terminal coupled to the first control line;
- a third transistor of the one conductivity type coupled between the first I/O line and the second I/O line and having a control terminal coupled to a second control line different from the first control line;
- and
- a fourth transistor of a second conductivity type coupled between the first I/O line and the second I/O line and having a control terminal coupled to the second control line.
7 more elements
A semiconductor device, comprising:
- an equalizing circuit performing pre-charge which pre-charges a signal input/output line pair, used for inputting/outputting data, to a first potential, and equalization which short-circuits the signal input/output line pair, independently of each other;
- and
- a control circuit which, in case a plurality of write operations occur in succession, halts the pre-charge control in the equalizing circuit during the consecutive write operations.
Dependencies are inferred from the claim text.