Systems and Methods for Improved Short Media Defect Detection

A data processing system, the data processing system comprising:

• a data detector circuit operable to apply a data detection algorithm to a symbol based data set guided by a decoded output to yield a detected output, wherein the decoded output includes at least a first multi-bit symbol, and wherein the detected output includes at least a second multi-bit symbol;
• a defect detector circuit including:
• a pre-processing circuit operable to:
• calculate a first value based upon a first combination of a soft data set corresponding to the first multi-bit symbol a second value based upon a second combination of the soft data set corresponding to the first multi-bit symbol;
• calculate the third value based upon a first combination of a soft data set corresponding to the second multi-bit symbol and a fourth value based upon a second combination of the soft data set corresponding to the second multi-bit symbol;
• multiply the first value by the third value to yield a first product;
• multiply the second value by the fourth value to yield a second product;
• and
• assert a suspect symbol indicator indicating a probability that the symbol is incorrect when at least one of the first product and the second product is negative;
• a binary data detection circuit operable to provide a defect indicator corresponding to a probable defect identified based on the suspect symbol indicator;
• and
• a data decoder circuit operable to apply a data decode algorithm to a decoder input derived from the detected output modified based on the defect indicator to yield the decoded output.

A storage device, the storage device comprising:

• a storage medium;
• a read/write head assembly operable to sense information from the storage medium and to provide a corresponding continuous signal;
• an analog to digital converter circuit operable to sample the continuous signal synchronous to a sampling clock to yield a set of digital samples;
• an equalizer circuit operable to equalize the set of digital samples and to provide a corresponding symbol based output;
• a data detector circuit operable to apply a data detection algorithm to the symbol based output guided by a decoded output to yield a detected output, wherein the decoded output includes at least a first multi-bit symbol, and wherein the detected output includes at least a second multi-bit symbol;
• a defect detector circuit including:
• a pre-processing circuit operable to:
• calculate a first value based upon a first combination of a soft data set corresponding to the first multi-bit symbol a second value based upon a second combination of the soft data set corresponding to the first multi-bit symbol;
• calculate the third value based upon a first combination of a soft data set corresponding to the second multi-bit symbol and a fourth value based upon a second combination of the soft data set corresponding to the second multi-bit symbol;
• multiply the first value by the third value to yield a first product;
• multiply the second value by the fourth value to yield a second product;
• and
• assert a suspect symbol indicator indicating a probability that the symbol is incorrect when at least one of the first product and the second product is negative;
• a binary data detection circuit operable to provide a defect indicator corresponding to a probable defect identified based on the suspect symbol indicator;
• and
• a data decoder circuit operable to apply a data decode algorithm to a decoder input derived from the detected output modified based on the defect indicator to yield the decoded output.