Phase-Locked Loop Apparatus and Method

A method for fast locking a phase of an oscillator output signal to a phase of a reference clock signal comprising:

• operating an oscillator having an output signal with a first frequency, where the first frequency is controllable by at least a first control parameter;
• receiving a first active edge of the reference clock signal;
• upon receiving the first active edge, starting to count a number of cycles of the oscillator output signal;
• upon receiving the first active edge, setting a value of a phase prediction parameter to a first value;
• receiving a second active edge of the reference clock signal;
• upon receiving the second active edge, determining a first phase of the oscillator output signal, wherein the first phase includes an accumulated count of the number of cycles of the oscillator output signal;
• upon receiving the second active edge, increasing the value of the phase prediction parameter with a desired frequency multiplication factor value;
• subtracting the first phase of the oscillator output signal from the value of the phase prediction parameter to obtain a phase error value;
• determining a rate of change of the phase error value;
• filtering the phase error value with a first set of loop filter parameters;
• filtering the rate of change with a second set of loop filter parameters;
• combining or selecting between the results of low-pass filtering the phase error and low-pass filtering the rate of change to determine a new value of the first control parameter;
• and
• forwarding the new value of the first control parameter to the oscillator to obtain a fast lock of the oscillator output signal phase to the phase of the reference clock signal.