Clock recovery circuit and clock and data recovery circuit

A clock and data recovery circuit, comprising:

• a clock recovery circuit configured to recover a clock from a data signal;
• and
• an identification circuit configured to perform an identification of the data signal using the recovered clock,
• wherein the clock recovery circuit includes:
• a phase comparison circuit configured to compare and output a phase difference signal indicating a phase difference between a data signal and the recovered clock;
• a charge pump circuit configured to output a current based on the phase difference signal;
• a loop filter configured to smooth the current and convert the smoothed current into a control voltage;
• an oscillation circuit configured to generate a first sine-wave clock having a frequency corresponding to the control voltage and a second sine-wave clock having a phase obtained by shifting a phase of the first sine-wave clock by 90 degrees;
• and
• a clock selector configured to select, as the recovered clock, one of the first sine-wave clock and the second sine-wave clock, a selected clock having a first voltage difference between a voltage of the selected clock at a time of a transition of the data signal and a center of an amplitude of the selected clock being larger than a second voltage difference between a voltage of a non-selected clock at the time and a center of an amplitude of the non-selected clock.