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US 2014/0210004 A1Published application
Self-adjusting gate hard mask
AssigneeInternational Business Machines Corporation
InventorEffendi Leobandung
Life of this patent
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Abstract
A method provides an intermediate semiconductor device structure and includes providing a water having first dummy gate plugs and second dummy gate plugs embedded in a first layer having a non planar wafer surface topography due at least to a presence of the fist dummy gate plugs; depositing at least one second layer over the first layer, the at least one second layer comprising a hard mask material; and removing at least a portion of the second layer to form a substantially planar wafer surface topography over the first dummy gate plugs and the second dummy gate plugs prior to gate conductor deposition.
Claims13
A method to provide an intermediate semiconductor device structure, comprising:
- providing a wafer comprising first dummy gate plugs and second dummy gate plugs embedded in a first layer having a non-planar wafer surface topography due at least to a presence of the first dummy gate plugs, the wafer being comprised of a plurality of fin structures formed from a patterned portion of a semiconductor on insulator layer that is disposed upon and in contact with a surface of a dielectric layer, the plurality of fin structures each having a top surface disposed at a height (h) above the surface of the dielectric layer, where an individual one of the first dummy gate plugs is disposed upon the top surface of one of the plurality of fin structures, where the second dummy gate plugs terminate upon the surface of the dielectric layer, and where a top surface of the individual one of the first dummy gate plugs is disposed above a top surface of the second dummy gate plugs by at least the height (h);
- depositing at least one second layer over the first layer, the at least one second layer comprising a hard mask material;
- and
- removing at least a portion of the second layer to form a substantially planar wafer surface topography over the first dummy gate plugs and the second dummy gate plugs prior to gate conductor deposition.
1 more element
A method to process a wafer during fabrication of devices on the wafer, comprising:
- providing a wafer having a surface upon which a FIN structure is disposed, the wafer comprising a first dummy gate plug disposed upon the FIN structure and a second dummy gate plug disposed upon the wafer surface, the wafer further comprising a conformally deposited first layer in which the first and the second dummy gate plugs are embedded, the first layer exhibiting a non-planar surface topography characterized by a depression due at least to a presence of the first dummy gate plug that is disposed upon the FIN structure;
- depositing a second layer over the first layer;
- removing the second layer to a surface of the first layer leaving a portion of the second layer within the depression;
- and
- depositing a third layer comprised of a hard mask nitride over the surface of the first layer and the portion of the second layer within the depression, the third layer having a substantially planar surface topography over the first dummy gate plug and over the second dummy gate plug, the third layer being deposited prior to hard mask definition over the first dummy gate plug and over the second dummy gate plug, removal of the first dummy gate plug and the second dummy gate plug and the defined hard masks, and gate metal deposition.
2 more elements
A method to process a wafer during fabrication of devices on the wafer, comprising:
- providing a wafer having a surface upon which a FIN structure is disposed, the wafer comprising a first dummy gate plug disposed upon the FIN structure and a second dummy gate plug disposed upon the wafer surface, the wafer further comprising a conformally deposited first layer in which the first and the second dummy gate plugs are embedded, the first layer exhibiting a non-planar surface topography characterized by a depression due at least to a presence of the first dummy gate plug that is disposed upon the FIN structure;
- depositing a second layer over the first layer;
- depositing a third layer over the second layer, the second layer and the third layer also exhibiting a non-planar surface topography characterized by the presence of the depression in the first layer;
- removing the third layer to a surface of the second layer leaving a portion of the third layer within the depression;
- removing the second layer and the portion of the third layer to a surface of the first layer leaving a portion of the second layer within the depression;
- and
- depositing a fourth layer comprised of a hard mask nitride over the surface of the first layer and the portion of the second layer within the depression, the fourth layer having a substantially planar surface topography over the first dummy gate plug and over the second dummy gate plug, the fourth layer being deposited prior to hard mask definition over the first dummy gate plug and over the second dummy gate plug, removal of the first dummy gate plug and the second dummy gate plug and the defined hard masks, and gate metal deposition.
4 more elements
13-18. (canceled)
Dependencies are inferred from the claim text.