N-channel double diffusion mos transistor, and semiconductor composite device

An n-channel double diffusion MOS transistor comprising:

• a p-type semiconductor substrate;
• a p-type epitaxial layer formed on the p-type semiconductor substrate through epitaxial growth;
• an n-type buried layer provided in a boundary between the p-type semiconductor substrate and the p-type epitaxial layer;
• a p-type body layer provided in a surface portion of the p-type epitaxial layer;
• an n-type source layer provided in the p-type body layer and defining a double diffusion structure together with the p-type body layer;
• an n-type drift layer provided in a surface portion of the p-type epitaxial layer in spaced relation from the p-type body layer to define a channel region between the n-type source layer and the n-type drift layer;
• an n-type drain layer provided in a surface portion of the p-type epitaxial layer in spaced relation from the channel region and in contact with the n-type drift layer;
• a p-type buried layer buried in the p-type epitaxial layer between the n-type drift layer and the n-type buried layer in contact with an upper surface of the n-type buried layer and having a lower impurity concentration than the n-type buried layer;
• a gate insulation film provided in a surface of the p-type epitaxial layer on the channel region;
• and
• a gate electrode provided in opposed relation to the channel region with intervention of the gate insulation film.