Transistors and methods of manufacturing the same
AssigneeSamsung Electronics Co., Ltd.
InventorsChang-Jae Yang, Sang-Su KIM, Jung-Dal CHOI, Sung-Gi HUR
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Abstract
A transistor and a method of manufacturing the same are disclosed. The transistor includes a first epitaxial layer, a channel layer, a gate structure and an impurity region. The first epitaxial layer on a substrate includes a silicon-germanium-tin (SixGe1-x-ySny) single crystal having a lattice constant greater than a lattice constant of a germanium (Ge) single crystal. The channel layer is disposed adjacent to the first epitaxial layer. The channel layer includes the germanium single crystal. The gate structure is disposed on the channel layer. The impurity region is disposed at an upper portion of the channel layer adjacent to the gate structure.
Claims20
A transistor, comprising:
- a first epitaxial layer disposed on a substrate, the first epitaxial layer including a silicon-germanium-tin (SixGe1-x-ySny) single crystal having a lattice constant greater than a lattice constant of a germanium (Ge) single crystal;
- a channel layer disposed adjacent to the first epitaxial layer, the channel layer including the germanium (Ge) single crystal;
- a gate structure disposed on the channel layer;
- and
- an impurity region disposed at an upper portion of the channel layer adjacent to the gate structure.
A transistor, comprising:
- a epitaxial layer on a substrate, the epitaxial layer including a silicon-germanium-tin (SixGe1-x-ySny) single crystal having a lattice constant substantially greater than a lattice constant of a germanium (Ge) single crystal;
- a protrusion portion projecting from an upper surface of the epitaxial layer, the protrusion portion extending in a first direction;
- a channel layer extending in the first direction on the protrusion portion, the channel layer including the germanium (Ge) single crystal;
- and
- a gate structure disposed on a sidewall of the protrusion portion, an upper surface of the channel layer and a sidewall of the channel layer, the gate structure extending in a second direction substantially perpendicular to the first direction.
A method of manufacturing a transistor, comprising:
- partially removing an upper portion of a substrate to form a recess;
- forming a first epitaxial layer to fill a lower portion of the recess, the first epitaxial layer including a silicon-germanium-tin (SixGe1-x-ySny) single crystal having a lattice constant greater than a lattice constant of a germanium (Ge) single crystal;
- forming a channel layer to fill an upper portion of the recess, the channel layer including the germanium (Ge) single crystal;
- forming a gate structure on the channel layer;
- and
- implanting impurities at an upper portion of the channel layer adjacent to the gate structure.
A transistor, comprising:
- a first epitaxial layer disposed on a substrate, the first epitaxial layer including a silicon-germanium-tin (SixGe1-x-ySny) single crystal;
- a channel layer disposed adjacent to the first epitaxial layer, the channel layer including a germanium (Ge) single crystal;
- a gate structure disposed on the channel layer;
- and
- an impurity region disposed at an upper portion of the channel layer adjacent to the gate structure;
- wherein the silicon-germanium-tin single crystal has an energy bandgap greater than an energy bandgap of the germanium single crystal.
Dependencies are inferred from the claim text.