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AssigneeBoe Technology Group Co., Ltd.
InventorsYoungsuk Song, Seongyeol Yoo, Seungjin Choi
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An array substrate, which is formed with a gate electrode (2), a source electrode (5), a drain electrode (6), a gate insulating layer (3), an active layer (4) and a passivation layer (9) in a thin film transistor region, and with the gate insulating layer (3), a pixel electrode (7), the passivation layer (9) and a common electrode (8) in a pixel electrode pattern region, and a color resin layer (11) is formed between the passivation layer (9) and the common electrode (8). Since the color resin layer (11) for planarization is formed on the passivation layer (9), the horizontal driving manner may be suitably applied in order to reduce light leakage, to improve contrast ratio and aperture ratio of a panel and to lower production costs.
An array substrate, comprising a gate line and a data line that define a pixel region including a thin film transistor region and a pixel electrode pattern region, wherein in the thin film transistor region a gate electrode, a source electrode, a drain electrode, a gate insulating layer, an active layer and a passivation layer are provided, and a channel part is formed between the source electrode and the drain electrode and recessed to the inner of the active layer;
Dependencies are inferred from the claim text.