Flattened substrate surface for substrate bonding

A design structure readable by a machine used in design, manufacture, or simulation of an integrated circuit, the design structure comprising:

• a device substrate including a first surface, a second surface opposite to the first surface, a plurality of device structures on the first surface, and an interconnect structure for the device structures, the interconnect structure including an interlayer dielectric layer with a top surface, a first conductive feature projecting above the top surface, and a second conductive feature projecting above the top surface, the first and second conductive features each having a height measured relative to the top surface;
• a final handle substrate bonded to the second surface of the device substrate;
• and
• at least one insulator layer on the top surface of the interlayer dielectric layer, the at least one insulator layer having a planar top surface and a thickness greater than the height of the first and second conductive features.