Semiconductor apparatus and stacked semiconductor apparatus for checking formation and connection of through silicon via

A stacked semiconductor apparatus comprising:

• a first chip having a first TSV connected between a first node and a second node;
• a second chip having a second TSV connected between a third node and a fourth node;
• and
• a connection unit configured to electrically connect the second node and the third node with each other,
• wherein the first chip includes a first TSV test unit configured to check a capacitance value of the first TSV and generate a first single test result in a single TSV test mode, and supply a power supply voltage to the first node in a stacked TSV test mode, and
• wherein the second chip includes a second TSV test unit configured to check a capacitance value of the second TSV and is generate a second single test result in the single TSV test mode, and electrically connect the third node and a fifth node with each other in the stacked TSV test mode.