Non-volatile memory device and method of manufacturing the same

A method of manufacturing a non-volatile memory device including a plurality of first wirings extending in a first direction, a plurality of second wirings extending in a second direction intersecting the first direction, and a non-volatile memory cell array layer where a plurality of non-volatile memory cells are arranged at intersection portions of the first wirings and the second wirings so to be interposed, the method comprising:

• sequentially stacking a first wiring material layer which is to be the first wiring and a first memory-layer constituting layer constituting the non-volatile memory cell above a substrate;
• performing dry etching so that the first memory-layer constituting layer and the first wiring material layer are etched to form a first pattern having a first line-and-space pattern extending in the first direction in a memory cell formation region and a first wiring hookup region adjacent in the first direction of the memory cell formation region and so that the first memory-layer constituting layer and the first wiring material layer are removed in a second wiring hookup region adjacent in the second direction of the memory cell formation region;
• forming a first interlayer insulating film to be embedded between line patterns constituting the first line-and-space pattern in the memory cell formation region and the first wiring hookup region and forming the first interlayer insulating film in a region which is removed by the dry etching in the second wiring hookup region;
• sequentially stacking a second wiring material layer which is to be the second wiring and a second memory-layer constituting layer constituting the non-volatile memory cell on the first interlayer insulating film and the first memory-layer constituting layer;
• performing dry etching so that the second memory-layer constituting layer, the second wiring material layer, the first memory-layer constituting layer, and the first interlayer insulating film are processed to form a second pattern including a second line-and-space pattern extending in the second direction and a first dummy pattern connecting line patterns constituting the second line-and-space pattern in the memory cell formation region and the second wiring hookup region, and so that the second memory-layer constituting layer, the second wiring material layer, the first memory-layer constituting layer, and the first interlayer insulating film are removed in first wiring hookup region;
• and
• removing the first dummy pattern.

A non-volatile memory device comprising:

• a memory cell formation region including a memory cell array layer where a plurality of non-volatile memory cells are formed in a matrix shape;
• a first wiring hookup region where a plurality of first wirings extending in a first direction are connected to the non-volatile memory cells in the memory cell formation region and are extracted out from the memory cell formation region;
• a second wiring hookup region where a plurality of second wirings extending in a second direction intersecting the first direction are connected to the non-volatile memory cells in an upper layer above the first wiring in the memory cell formation region and are extracted out from the memory cell formation region;
• and
• a first dummy wiring which is arranged at a position separated from the end portion of the second wiring opposite to the side of the second wiring hookup region in the same layer as that of the second wiring.