3d assembly for interposer bow

A method for packaging a semiconductor device comprising:

• attaching a first array of solder material to a first surface of an interposer;
• bringing the first array of solder material into physical contact with a laminate;
• initially bonding the interposer to the laminate by applying a first temperature and pressure gradient to the first array of solder material such that a melting temperature of the first array of solder material is not exceeded;
• attaching a second array of solder material to a processor chip;
• bringing the second array of solder material into physical contact with a second surface of said interposer, wherein said second surface has a plurality of interconnect pads;
• and
• initially bonding the interposer to the processor chip by applying a second the first temperature and pressure gradient to the first second array of solder material such that a melting temperature of the second array of solder material is not exceeded.