# US 2014/0208285 A1 · Self-aligned double patterning via enclosure design > Agents: this data is available as JSON from the patentgrep API and MCP server — see https://patentgrep.com/llms.txt - Number: US 2014/0208285 A1 - Document ID: US20140208285A1 - Status: Published application - Kind: A1 - Application number: 13/746,508 - Filed: 2013-01-22 - Published: 2014-07-24 - Earliest claimed: 2013-01-22 - Assignees: Globalfoundries Inc. - Applicants: Globalfoundries Inc. - Inventors: Jongwook Kye; Harry J. Levinson; Jason E. Stephens; Lei Yuan - Web page: https://patentgrep.com/patent/US20140208285A1 ## CPC - G06F 30/398: Design verification or optimisation, e.g. using design rule check [DRC], layout versus schematics [LVS] or finite element methods [FEM] (optical proximity correction [OPC] design processes G03F1/36) - G06F 30/39: Circuit design at the physical level (physical level design for reconfigurable circuits G06F30/347) - G03F 1/70: Adapting basic layout or design of masks to lithographic process requirements, e.g., second iteration correction of mask patterns for imaging - G06F: ELECTRIC DIGITAL DATA PROCESSING (computer systems based on specific computational models G06N) - G03F: PHOTOMECHANICAL PRODUCTION OF TEXTURED OR PATTERNED SURFACES, e.g. FOR PRINTING, FOR PROCESSING OF SEMICONDUCTOR DEVICES; MATERIALS THEREFOR; ORIGINALS THEREFOR; APPARATUS SPECIALLY ADAPTED THEREFOR; (phototypographic composing devices B41B; photosensitive materials or processes for photographic purposes G03C; electrophotography, sensitive layers or processes therefor G03G) ## Abstract A design methodology for determining a via enclosure rule for use with a self-aligned double pattern (SADP) technique is disclosed. The shape of the block mask serves as a criterion for choosing a via enclosure rule. Different block mask shapes within an integrated circuit design may utilize different rules and provide different margins for via enclosure. A tight via enclosure design rule reduces the margin of a line beyond the via where possible, while a loose via enclosure design rule increases the margin of a line beyond the via where it is beneficial to do so. ## Claims ### Claim 1 A method for computing via enclosure rules, comprising: identifying, by at least one computing device, line termination modes in a self-aligned double patterning line pattern comprising a plurality of lines and vias; assigning, by the at least one computing device, a first via enclosure rule in response to identifying a line termination mode of inner vertex block mask, wherein the inner vertex block mask comprises at least one vertex that has an outer angle that is less than 180 degrees; and assigning, by the at least one computing device, a second via enclosure rule in response to identifying a line termination mode of outer vertex block mask, wherein the outer vertex block mask consists of vertices that have an outer angle that is greater than 180 degrees. ### Claim 2 (depends on 1) The method of claim 1, wherein assigning a first via enclosure rule comprises assigning a first margin, and wherein assigning a second via enclosure rule comprises assigning a second margin. ### Claim 3 (depends on 2) The method of claim 2, wherein the first margin is larger than the second margin. ### Claim 4 (depends on 3) The method of claim 3, wherein the first margin is about two to three times larger than the second margin. ### Claim 5 (depends on 3) The method of claim 3, wherein the first margin ranges from about 8 nanometers to about 12 nanometers, and wherein the second margin ranges from about 28 nanometers to about 32 nanometers. ### Claim 6 (depends on 2) The method of claim 2, further comprising assigning a third via enclosure rule in response to identifying a line termination mode of mandrel. ### Claim 7 (depends on 6) The method of claim 6, wherein assigning a third via enclosure rule comprises assigning a third margin. ### Claim 8 (depends on 7) The method of claim 7, wherein the third margin is equal to the first margin. ### Claim 9 (depends on 1) The method of claim 1, wherein identifying a line termination mode of outer vertex block mask comprises identifying a rectangular block mask. ### Claim 10 (depends on 1) The method of claim 1, wherein identifying a line termination mode of inner vertex block mask comprises identifying an L-shaped block mask. ### Claim 11 (depends on 1) The method of claim 1, wherein identifying a line termination mode of inner vertex block mask comprises identifying a U-shaped block mask. ### Claim 12 A method for computing via enclosure rules, comprising: identifying, by at least one computing device, line termination modes in a self-aligned double patterning line pattern comprising a plurality of lines and vias; assigning, by the at least one computing device, a first via enclosure rule in response to identifying a set of aligned adjacent lines; and assigning, by the at least one computing device, a second via enclosure rule in response to identifying a set of misaligned adjacent lines. ### Claim 13 (depends on 12) The method of claim 12, wherein assigning a first via enclosure rule comprises assigning a first margin, and wherein assigning a second via enclosure rule comprises assigning a second margin. ### Claim 14 (depends on 13) The method of claim 13, wherein the second margin is larger than the first margin. ### Claim 15 (depends on 14) The method of claim 14, wherein the second margin is about two to three times larger than the first margin. ### Claim 16 A non-transitory computer-readable medium comprising instructions which, when executed by a processor, perform the steps of: identifying line termination modes in a self-aligned double patterning line pattern comprising a plurality of lines and vias; assigning a first via enclosure rule in response to identifying a line termination mode of inner vertex block mask, wherein the inner vertex block mask comprises at least one vertex that has an outer angle that is less than 180 degrees; and assigning a second via enclosure rule in response to identifying a line termination mode of outer vertex block mask, wherein the outer vertex block mask consists of vertices that have an outer angle that is greater than 180 degrees. ### Claim 17 (depends on 16) The computer-readable medium of claim 16, further comprising instructions which, when executed by a processor, perform the steps of: assigning a first margin corresponding to the first via enclosure rule; and assigning a second margin corresponding to the second via enclosure rule. ### Claim 18 (depends on 16) The computer-readable medium of claim 16, further comprising instructions which, when executed by a processor, perform the step of assigning a third via enclosure rule in response to identifying a line termination mode of mandrel. ### Claim 19 (depends on 17) The computer-readable medium of claim 17, further comprising instructions which, when executed by a processor, perform the step of assigning the first margin as larger than the second margin. ### Claim 20 (depends on 19) The computer-readable medium of claim 19, further comprising instructions which, when executed by a processor, perform the step of assigning the first margin as about two to three larger than the second margin.